#Build: Synplify Pro E-2010.09L-SP2, Build 081R, Feb 16 2011 #install: C:\lscc\diamond\1.2\synpbase #OS: 6.1 #Hostname: LMOBILE06 #Implementation: tftsurfer #Sun Sep 18 00:45:36 2011 $ Start of Compile #Sun Sep 18 00:45:36 2011 Synopsys VHDL Compiler, version comp520rcp2, Build 118R, built Feb 11 2011 @N: : | Running in 32-bit mode Copyright (C) 1994-2011 Synopsys, Inc. This software the associated documentation are confidential and proprietary to Synopsys, Inc. Your use or disclosure of this software subject to the terms and conditions of a written license agreement between you, or your company, and Synopsys, Inc. @N:CD720 : std.vhd(123) | Setting time resolution to ns @N: : tftsurfer_top.vhd(48) | Top entity is set to tftsurfer_top. VHDL syntax check successful! File C:\work\LSCC\TFTSurfer\VHDL\tftsurfer_demo_v0\par_d12\..\src\sdram_ctrl.vhd changed - recompiling @N:CD630 : tftsurfer_top.vhd(48) | Synthesizing work.tftsurfer_top.rtl_tftsurfer_top @N:CD630 : machxo2.vhd(2289) | Synthesizing work.osch.syn_black_box Post processing for work.osch.syn_black_box @N:CD630 : machxo2.vhd(2032) | Synthesizing work.oddrxe.syn_black_box Post processing for work.oddrxe.syn_black_box @W:CD638 : tftsurfer_top.vhd(404) | Signal tft_bank_sig is undriven @W:CD638 : tftsurfer_top.vhd(405) | Signal tft_sect_sig is undriven @N:CD630 : tx_lvds_71.vhd(14) | Synthesizing work.tx_lvds_71.structure @N:CD630 : machxo2.vhd(1406) | Synthesizing work.rom16x1a.syn_black_box Post processing for work.rom16x1a.syn_black_box @N:CD630 : machxo2.vhd(221) | Synthesizing work.fd1p3bx.syn_black_box Post processing for work.fd1p3bx.syn_black_box @N:CD630 : machxo2.vhd(233) | Synthesizing work.fd1p3dx.syn_black_box Post processing for work.fd1p3dx.syn_black_box @N:CD630 : machxo2.vhd(2068) | Synthesizing work.oddrx71a.syn_black_box Post processing for work.oddrx71a.syn_black_box @N:CD630 : machxo2.vhd(1902) | Synthesizing work.clkdivc.syn_black_box Post processing for work.clkdivc.syn_black_box @N:CD630 : machxo2.vhd(1181) | Synthesizing work.ob.syn_black_box Post processing for work.ob.syn_black_box @N:CD630 : machxo2.vhd(1922) | Synthesizing work.eclksynca.syn_black_box Post processing for work.eclksynca.syn_black_box @N:CD630 : machxo2.vhd(1488) | Synthesizing work.vlo.syn_black_box Post processing for work.vlo.syn_black_box @N:CD630 : machxo2.vhd(1481) | Synthesizing work.vhi.syn_black_box Post processing for work.vhi.syn_black_box Post processing for work.tx_lvds_71.structure @N:CD630 : tft_timing_ctrl.vhd(75) | Synthesizing work.tft_timing_ctrl.rtl_tft_timing_ctrl @N:CD233 : tft_timing_ctrl.vhd(158) | Using sequential encoding for type vsync_state @N:CD233 : tft_timing_ctrl.vhd(163) | Using sequential encoding for type vsync_to_hsync_state @N:CD233 : tft_timing_ctrl.vhd(168) | Using sequential encoding for type hsync_state @N:CD233 : tft_timing_ctrl.vhd(173) | Using sequential encoding for type hdata_state @W:CD604 : tft_timing_ctrl.vhd(312) | OTHERS clause is not synthesized @W:CD604 : tft_timing_ctrl.vhd(341) | OTHERS clause is not synthesized @W:CD604 : tft_timing_ctrl.vhd(370) | OTHERS clause is not synthesized @W:CD604 : tft_timing_ctrl.vhd(401) | OTHERS clause is not synthesized @W:CD604 : tft_timing_ctrl.vhd(429) | OTHERS clause is not synthesized Post processing for work.tft_timing_ctrl.rtl_tft_timing_ctrl @W:CL169 : tft_timing_ctrl.vhd(550) | Pruning Register tft_test_reg1 @W:CL169 : tft_timing_ctrl.vhd(550) | Pruning Register tft_test_reg0 @W:CL169 : tft_timing_ctrl.vhd(447) | Pruning Register row_cnt(9 downto 0) @W:CL169 : tft_timing_ctrl.vhd(447) | Pruning Register column_cnt(9 downto 0) @W:CL169 : tft_timing_ctrl.vhd(386) | Pruning Register debug_hsync_reg @W:CL169 : tft_timing_ctrl.vhd(386) | Pruning Register debug_hsync_st(hsync_st0) @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 15 of hdata_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 14 of hdata_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 13 of hdata_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 12 of hdata_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 11 of hdata_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 15 of hsync_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 14 of hsync_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 13 of hsync_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 12 of hsync_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 11 of hsync_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 15 of vsync_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 14 of vsync_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 13 of vsync_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 12 of vsync_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(717) | Pruning bit 11 of vsync_final_sr(15 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(570) | Pruning bit 2 of tft_sect_reg(2 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(570) | Pruning bit 1 of tft_sect_reg(2 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(523) | Pruning bit 2 of tft_pixel_reg(18 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(523) | Pruning bit 1 of tft_pixel_reg(18 downto 0) - not in use ... @W:CL265 : tft_timing_ctrl.vhd(523) | Pruning bit 0 of tft_pixel_reg(18 downto 0) - not in use ... @N:CD630 : tft_pixel_rgb_pipeliner.vhd(44) | Synthesizing work.tft_pixel_rgb_pipeliner.rtl_tft_pixel_rgb_pipeliner @N:CD233 : tft_pixel_rgb_pipeliner.vhd(82) | Using sequential encoding for type read_enable_state @W:CD604 : tft_pixel_rgb_pipeliner.vhd(125) | OTHERS clause is not synthesized @N:CD630 : pixel_rgb_fifo.vhd(14) | Synthesizing work.pixel_rgb_fifo.structure @N:CD630 : machxo2.vhd(364) | Synthesizing work.fd1s3dx.syn_black_box Post processing for work.fd1s3dx.syn_black_box @N:CD630 : machxo2.vhd(353) | Synthesizing work.fd1s3bx.syn_black_box Post processing for work.fd1s3bx.syn_black_box @N:CD630 : machxo2.vhd(1662) | Synthesizing work.dpr16x4c.syn_black_box Post processing for work.dpr16x4c.syn_black_box @N:CD630 : machxo2.vhd(176) | Synthesizing work.fadd2b.syn_black_box Post processing for work.fadd2b.syn_black_box @N:CD630 : machxo2.vhd(33) | Synthesizing work.ageb2.syn_black_box Post processing for work.ageb2.syn_black_box @N:CD630 : machxo2.vhd(166) | Synthesizing work.cu2.syn_black_box Post processing for work.cu2.syn_black_box @N:CD630 : machxo2.vhd(1495) | Synthesizing work.xor2.syn_black_box Post processing for work.xor2.syn_black_box @N:CD630 : machxo2.vhd(1275) | Synthesizing work.or2.syn_black_box Post processing for work.or2.syn_black_box @N:CD630 : machxo2.vhd(680) | Synthesizing work.inv.syn_black_box Post processing for work.inv.syn_black_box @N:CD630 : machxo2.vhd(63) | Synthesizing work.and2.syn_black_box Post processing for work.and2.syn_black_box Post processing for work.pixel_rgb_fifo.structure Post processing for work.tft_pixel_rgb_pipeliner.rtl_tft_pixel_rgb_pipeliner @N:CD630 : sdram_ctrl.vhd(24) | Synthesizing work.sdram_ctrl.rtl_sdram_ctrl @N:CD232 : sdram_ctrl.vhd(64) | Using gray code encoding for type sdram_fsm_state @W:CD604 : sdram_ctrl.vhd(507) | OTHERS clause is not synthesized Post processing for work.sdram_ctrl.rtl_sdram_ctrl @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 19 of sys_addr_reg2(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 18 of sys_addr_reg2(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 17 of sys_addr_reg2(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 16 of sys_addr_reg2(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 15 of sys_addr_reg2(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 14 of sys_addr_reg2(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 13 of sys_addr_reg2(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 12 of sys_addr_reg2(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 11 of sys_addr_reg2(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 10 of sys_addr_reg2(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 9 of sys_addr_reg2(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 8 of sys_addr_reg2(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 19 of sys_addr_reg1(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 18 of sys_addr_reg1(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 17 of sys_addr_reg1(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 16 of sys_addr_reg1(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 15 of sys_addr_reg1(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 14 of sys_addr_reg1(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 13 of sys_addr_reg1(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 12 of sys_addr_reg1(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 11 of sys_addr_reg1(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 10 of sys_addr_reg1(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 9 of sys_addr_reg1(21 downto 0) - not in use ... @W:CL265 : sdram_ctrl.vhd(151) | Pruning bit 8 of sys_addr_reg1(21 downto 0) - not in use ... @N:CD630 : monster_manager.vhd(48) | Synthesizing work.monster_manager.rtl_monster_manager @N:CD231 : monster_manager.vhd(96) | Using onehot encoding for type fsm_state (idle="1000000000000000000000000000000") @W:CD604 : monster_manager.vhd(388) | OTHERS clause is not synthesized @W:CD638 : monster_manager.vhd(111) | Signal tft_sdram_addr_reg is undriven @W:CD638 : monster_manager.vhd(117) | Signal dummy_reg is undriven @W:CD638 : monster_manager.vhd(118) | Signal red_reg is undriven @W:CD638 : monster_manager.vhd(119) | Signal green_reg is undriven @W:CD638 : monster_manager.vhd(120) | Signal blue_reg is undriven @W:CD638 : monster_manager.vhd(124) | Signal sys_data_val_reg1 is undriven @W:CD638 : monster_manager.vhd(125) | Signal sys_data_val_reg2 is undriven @W:CD638 : monster_manager.vhd(127) | Signal tft_red_reg is undriven @W:CD638 : monster_manager.vhd(128) | Signal tft_green_reg is undriven @W:CD638 : monster_manager.vhd(129) | Signal tft_blue_reg is undriven Post processing for work.monster_manager.rtl_monster_manager @W:CL111 : monster_manager.vhd(186) | All reachable assignments to sys_be(0) assign '0', register removed by optimization @W:CL111 : monster_manager.vhd(186) | All reachable assignments to sys_be(1) assign '0', register removed by optimization @N:CD630 : pixel_addr_data_fifo.vhd(44) | Synthesizing work.pixel_addr_data_fifo.rtl_pixel_addr_data_fifo @N:CD630 : pixel_data_fifo.vhd(14) | Synthesizing work.pixel_data_fifo.structure @N:CD630 : machxo2.vhd(579) | Synthesizing work.fsub2b.syn_black_box Post processing for work.fsub2b.syn_black_box Post processing for work.pixel_data_fifo.structure @W:CL168 : pixel_data_fifo.vhd(856) | Pruning instance rfilld - not in use ... @N:CD630 : pixel_addr_fifo.vhd(14) | Synthesizing work.pixel_addr_fifo.structure Post processing for work.pixel_addr_fifo.structure Post processing for work.pixel_addr_data_fifo.rtl_pixel_addr_data_fifo @N:CD630 : sdram_test_generator.vhd(48) | Synthesizing work.sdram_test_generator.rtl_sdram_test_generator @N:CD233 : sdram_test_generator.vhd(69) | Using sequential encoding for type fsm_state @W:CD604 : sdram_test_generator.vhd(123) | OTHERS clause is not synthesized Post processing for work.sdram_test_generator.rtl_sdram_test_generator @W:CL265 : sdram_test_generator.vhd(137) | Pruning bit 2 of scaler_cnt(2 downto 0) - not in use ... @W:CL265 : sdram_test_generator.vhd(137) | Pruning bit 1 of scaler_cnt(2 downto 0) - not in use ... @N:CD630 : power_manager.vhd(52) | Synthesizing work.power_manager.rtl_power_manager @N:CD231 : power_manager.vhd(104) | Using onehot encoding for type delay_fsm_state (idle="1000000") @N:CD231 : power_manager.vhd(114) | Using onehot encoding for type tft_on_off_state (idle="100000000") @W:CD604 : power_manager.vhd(196) | OTHERS clause is not synthesized @W:CD604 : power_manager.vhd(414) | OTHERS clause is not synthesized Post processing for work.power_manager.rtl_power_manager @N:CD630 : tft_on_off_button_ctrl.vhd(45) | Synthesizing work.tft_on_off_button_ctrl.rtl_tft_on_off_button_ctrl @N:CD233 : tft_on_off_button_ctrl.vhd(67) | Using sequential encoding for type button_state @W:CD604 : tft_on_off_button_ctrl.vhd(149) | OTHERS clause is not synthesized Post processing for work.tft_on_off_button_ctrl.rtl_tft_on_off_button_ctrl @N:CD630 : pll_block.vhd(14) | Synthesizing work.pll_block.structure @N:CD630 : machxo2.vhd(2219) | Synthesizing work.ehxpllj.syn_black_box Post processing for work.ehxpllj.syn_black_box Post processing for work.pll_block.structure Post processing for work.tftsurfer_top.rtl_tftsurfer_top @W:CL252 : tftsurfer_top.vhd(405) | Bit 0 of signal tft_sect_sig is floating - a simulation mismatch is possible @W:CL252 : tftsurfer_top.vhd(405) | Bit 1 of signal tft_sect_sig is floating - a simulation mismatch is possible @W:CL252 : tftsurfer_top.vhd(405) | Bit 2 of signal tft_sect_sig is floating - a simulation mismatch is possible @W:CL252 : tftsurfer_top.vhd(404) | Bit 0 of signal tft_bank_sig is floating - a simulation mismatch is possible @W:CL252 : tftsurfer_top.vhd(404) | Bit 1 of signal tft_bank_sig is floating - a simulation mismatch is possible @W:CL240 : tftsurfer_top.vhd(59) | test_pt5 is not assigned a value (floating) - a simulation mismatch is possible @W:CL240 : tftsurfer_top.vhd(58) | test_pt4 is not assigned a value (floating) - a simulation mismatch is possible @W:CL240 : tftsurfer_top.vhd(57) | test_pt3 is not assigned a value (floating) - a simulation mismatch is possible @W:CL240 : tftsurfer_top.vhd(56) | test_pt2 is not assigned a value (floating) - a simulation mismatch is possible @W:CL240 : tftsurfer_top.vhd(55) | test_pt1 is not assigned a value (floating) - a simulation mismatch is possible @W:CL245 : tftsurfer_top.vhd(639) | Bit 0 of input tft_bank of instance TFT_TIMING_CTRL_INST is floating @W:CL245 : tftsurfer_top.vhd(639) | Bit 1 of input tft_bank of instance TFT_TIMING_CTRL_INST is floating @W:CL245 : tftsurfer_top.vhd(639) | Bit 0 of input tft_sect of instance TFT_TIMING_CTRL_INST is floating @W:CL245 : tftsurfer_top.vhd(639) | Bit 1 of input tft_sect of instance TFT_TIMING_CTRL_INST is floating @W:CL245 : tftsurfer_top.vhd(639) | Bit 2 of input tft_sect of instance TFT_TIMING_CTRL_INST is floating @N:CL201 : tft_on_off_button_ctrl.vhd(125) | Trying to extract state machine for register button_st Extracted state machine for register button_st State machine has 3 reachable states with original encodings of: 00 01 10 @N:CL201 : power_manager.vhd(337) | Trying to extract state machine for register tft_on_off_st Extracted state machine for register tft_on_off_st State machine has 9 reachable states with original encodings of: 000000001 000000010 000000100 000001000 000010000 000100000 001000000 010000000 100000000 @N:CL201 : power_manager.vhd(156) | Trying to extract state machine for register delay_st Extracted state machine for register delay_st State machine has 7 reachable states with original encodings of: 0000001 0000010 0000100 0001000 0010000 0100000 1000000 @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 15 of sdram_fifo_wr_rgb(15 downto 0) @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 14 of sdram_fifo_wr_rgb(15 downto 0) @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 13 of sdram_fifo_wr_rgb(15 downto 0) @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 12 of sdram_fifo_wr_rgb(15 downto 0) @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 10 of sdram_fifo_wr_rgb(15 downto 0) @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 9 of sdram_fifo_wr_rgb(15 downto 0) @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 8 of sdram_fifo_wr_rgb(15 downto 0) @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 7 of sdram_fifo_wr_rgb(15 downto 0) @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 6 of sdram_fifo_wr_rgb(15 downto 0) @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 4 of sdram_fifo_wr_rgb(15 downto 0) @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 3 of sdram_fifo_wr_rgb(15 downto 0) @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 2 of sdram_fifo_wr_rgb(15 downto 0) @W:CL260 : sdram_test_generator.vhd(198) | Pruning Register bit 1 of sdram_fifo_wr_rgb(15 downto 0) @N:CL201 : sdram_test_generator.vhd(105) | Trying to extract state machine for register fsm_st Extracted state machine for register fsm_st State machine has 4 reachable states with original encodings of: 00 01 10 11 @N:CL201 : monster_manager.vhd(186) | Trying to extract state machine for register fsm_st Extracted state machine for register fsm_st State machine has 31 reachable states with original encodings of: 0000000000000000000000000000001 0000000000000000000000000000010 0000000000000000000000000000100 0000000000000000000000000001000 0000000000000000000000000010000 0000000000000000000000000100000 0000000000000000000000001000000 0000000000000000000000010000000 0000000000000000000000100000000 0000000000000000000001000000000 0000000000000000000010000000000 0000000000000000000100000000000 0000000000000000001000000000000 0000000000000000010000000000000 0000000000000000100000000000000 0000000000000001000000000000000 0000000000000010000000000000000 0000000000000100000000000000000 0000000000001000000000000000000 0000000000010000000000000000000 0000000000100000000000000000000 0000000001000000000000000000000 0000000010000000000000000000000 0000000100000000000000000000000 0000001000000000000000000000000 0000010000000000000000000000000 0000100000000000000000000000000 0001000000000000000000000000000 0010000000000000000000000000000 0100000000000000000000000000000 1000000000000000000000000000000 @W:CL159 : monster_manager.vhd(72) | Input sys_cycle_end is unused @W:CL159 : monster_manager.vhd(75) | Input sys_ref_ack is unused @N:CL135 : sdram_ctrl.vhd(151) | Found seqShift sys_be_reg2, depth=3, width=2 @N:CL177 : sdram_ctrl.vhd(185) | Sharing sequential element sdram_cke_reg. @N:CL201 : sdram_ctrl.vhd(185) | Trying to extract state machine for register sdram_fsm_st Extracted state machine for register sdram_fsm_st State machine has 49 reachable states with original encodings of: 000000 000001 000010 000011 000100 000101 000110 000111 001000 001001 001010 001011 001100 001101 001110 001111 010000 010001 010010 010011 010100 010101 010110 010111 011000 011001 011010 011011 011100 011101 011110 011111 101000 110000 110001 110010 110011 110100 110101 110110 110111 111000 111001 111010 111011 111100 111101 111110 111111 @W:CL260 : tft_timing_ctrl.vhd(658) | Pruning Register bit 2 of tft_test_red(7 downto 0) @W:CL260 : tft_timing_ctrl.vhd(658) | Pruning Register bit 1 of tft_test_red(7 downto 0) @W:CL260 : tft_timing_ctrl.vhd(658) | Pruning Register bit 1 of tft_test_green(7 downto 0) @W:CL260 : tft_timing_ctrl.vhd(658) | Pruning Register bit 2 of tft_test_blue(7 downto 0) @W:CL260 : tft_timing_ctrl.vhd(658) | Pruning Register bit 1 of tft_test_blue(7 downto 0) @W:CL169 : tft_timing_ctrl.vhd(658) | Pruning Register tft_test_green(0) @W:CL169 : tft_timing_ctrl.vhd(658) | Pruning Register tft_test_red(0) @W:CL246 : tft_timing_ctrl.vhd(85) | Input port bits 2 to 1 of tft_sect(2 downto 0) are unused @W:CL159 : tft_timing_ctrl.vhd(83) | Input tft_test is unused @W:CL159 : tft_timing_ctrl.vhd(87) | Input tft_sig_en is unused @W:CL159 : tft_timing_ctrl.vhd(88) | Input tft_rgb_en is unused @END Process took 0h:00m:01s realtime, 0h:00m:01s cputime # Sun Sep 18 00:45:37 2011 ###########################################################]